Wireless communication devices include a receiver configured to receive and process an incoming signal. However, an unwanted DC component can frequently appear at various stages in a wireless receiver design. The DC component or offset may cause the receiver to operate inefficiently or, in extreme cases, may prevent the receiver from operating at all.
In order to avoid the typical problems caused by DC offset, a correction or cancellation process is generally used to remove the unwanted DC component while preserving the fidelity of the higher frequency components of the signal. Since an ideal filter (e.g., one that can remove the DC component while perfectly preserving the other frequency components) is impractical or even impossible to implement, existing receiver designs typically include a high pass filter having a fixed cutoff bandwidth (or frequency). The cutoff bandwidth (or frequency) may be selected as a compromise between various requirements, such as, for example, fast convergence of the correction of the initial DC offset upon activation of the receiver (requires a higher 3 dB bandwidth), preservation of the fidelity of the received signal during the receiver's operation (requires a lower 3 dB bandwidth), and the ability to track anticipated changes in the nature of the unwanted DC component throughout the receiver's operation (requires varying 3 dB bandwidths depending on the DC level changes involved). In one implementation of a Global System for Mobile Communications (GSM) receiver, for example, a 3 dB bandwidth of less than 5 KHz might be used during the capture of a burst, in order to preserve received signal fidelity. On the other hand, a 3 dB bandwidth of greater than 50 KHz might be used prior to the burst, in order to rapidly cancel a large amount of DC offset.
Receivers used in Time Division Duplex (TDD) systems have to be able to cancel DC signal components rapidly, in order to meet system timing requirements while also preserving signal integrity. For example, in order to meet certain system specifications, a TDD receiver must be able to turn on and cancel DC components within a relatively small window of 10s of microseconds between receive slots. Consequently, the receiver must be designed to function very aggressively to remove the DC components initially, but the receiver's design must also allow for good signal fidelity during the receive slot. For example, if the bandwidth of the DC correction filter is maintained continually at the low cutoff frequency, then the convergence time of the initial DC offset would require 10 times more than that of a high cutoff filter (on the order of 100s of microseconds), which exceeds the allowable time. Also, maintaining a DC offset removal filter with a high cutoff frequency while an active slot is being received, would degrade the signal quality to the extent that demodulation would not occur.
Nevertheless, balancing the various system requirements is difficult because some of the requirements conflict with others. For example, relatively large fluctuations in DC levels generally require a high cutoff frequency response, but this requirement is at odds with the need to preserve the fidelity of the received signal. Also, this requirement is impossible to achieve with a fixed bandwidth high pass filter. Furthermore, such traditional, non-adaptive approaches do not effectively exploit those systems that can dynamically transition between TDD and Frequency Division Duplex (FDD) operations, such as Wideband Code Division Multiple Access (WCDMA) FDD and compressed mode operation systems.